Xilinx XC3S500E pin description

From OpenCircuits
Revision as of 07:52, 27 August 2007 by Freqmax (talk | contribs) (IP)
Jump to navigation Jump to search
Signal Description
IO_L.. Can be used as single ended, or differential with N + P in conjuction
IP Can only be used as inputs
GCLK Global clock
A*, D*, LDC* Addressable eeprom configuration

See page 70/234 in datasheet.