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== Description ==
 
== Description ==
This project will capture High Definition Video 1280x720 at 30fps, and hopefully be capable of 60fps and maybe even 1080p.  I intend to use a cheap FPGA, A HiSpeed USB PHY, and an Analog Devices Video A/D chip.  I will nail down exact chip numbers later.  The target platform driver and example code will be written for GNU/Linux.  This project is more a proof of concept and more for fun and excercise rather than to be practical.  But I will take any advice and help that I can get and who knows what we might create here.  Entire BOM should be less than $40 but we'll see.
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This project will capture High Definition Video 1280x720 at 30fps, and hopefully be capable of 60fps and maybe even 1080p.  I intend to use a cheap FPGA, A HiSpeed USB PHY, and an Analog Devices Video A/D chip.  I will nail down exact chip numbers later.  The target platform driver and example code will be written for linux.  This project is more a proof of concept and more for fun and excercise rather than to be practical.  But I will take any advice and help that I can get and who knows what we might create here.  Entire BOM should be less than $40 but we'll see.
  
 
Yes I know about the Hauppage HD-PVR or whatever its called that Capures Component video at 720p.  The problem is that device uses H.264 encoding, which is just way too expensive to decode, it takes a Dual Core 1GHz Machine at 99%.  It is also not totally open to hacking.
 
Yes I know about the Hauppage HD-PVR or whatever its called that Capures Component video at 720p.  The problem is that device uses H.264 encoding, which is just way too expensive to decode, it takes a Dual Core 1GHz Machine at 99%.  It is also not totally open to hacking.
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'''1.  Why analog.  Digital is the future man!  Haven't you heard?'''
 
'''1.  Why analog.  Digital is the future man!  Haven't you heard?'''
  
This projects intended application for the professional A/V embedded market has and always will have for the forseable future a need for analog.  Adding digital I/O is just adding another (actually DVI-D) simple chip and bus.  Analog is here to stay in the Pro world at least for the next decade.  I know what I am talking about here ;)
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My application for the professional embedded market has and always will have for the forseable future a need for analog.  Adding digital I/O is just adding another (actually DVI-D) simple chip and bus.  Analog is here to stay in the Pro world at least for the next decade.  I know what I am talking about here ;)
  
 
If you don't work with commercial video installations and large Vid systems on a regular basis and just play w/ home plasma and Blueray home theater systems then it will seem silly to start analog.  I understand as that is the extent of most people's background in video.
 
If you don't work with commercial video installations and large Vid systems on a regular basis and just play w/ home plasma and Blueray home theater systems then it will seem silly to start analog.  I understand as that is the extent of most people's background in video.
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'''2. Have you heard of http://www3.elphel.com/ It is an HD Camera w/ a Xilinx FPGA onboard'''
 
'''2. Have you heard of http://www3.elphel.com/ It is an HD Camera w/ a Xilinx FPGA onboard'''
  
No, but thats a really cool project.  I am interested in how they handle USB.  I might be able to grab some ideas for my project.  They use theora and thats great.  This project will keep compression to the minumum to fit HD Video on the USB 480 Mbps bus.
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No, but thats a really cool project.  I am interested in how they handle USB.  I might be able to grab some ideas for my project.  They use theora and thats great.  This project will keep compression to a minumum to fit on the USB 480 Mbps bus.
 
 
'''3. Why is this project not using Theora or Dirac.  What are you using for a video compressor?'''
 
 
 
This project is not a video compressor, it is a video capture device.  Very little compression is needed to get 720p60 onto USB Hi-Speed.  What little compression will be done is image compression on the individual frames.  Once the data is in the CPU the user may compress it using theora or Dirac, store it as raw, or process it however they like.
 
 
 
I want to modify the video stream as little as possible.  Video compression implies decompression.  Since many will want to use the data live, lets not add an extra step of decompression for the CPU and user application.  If they want to capture the stream, let the user application store it to the Hard Disk in whatever format the user likes, hopefully its Theora or Dirac.
 
 
 
Finally video compression is expensive for hardware and adds things like SDRAM and more gates to handle the re-encoding that Theora and other video codecs require.  There is a huge difference in required hardware for video compression versus image compression.
 
 
 
 
== How To Donate to This Project ==
 
== How To Donate to This Project ==
 
You may Donate to this project by clicking here:
 
You may Donate to this project by clicking here:
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I need help with board layout in Eagle, USB interfacing and drivers, organization.
 
I need help with board layout in Eagle, USB interfacing and drivers, organization.
 
== Current Status / News ==
 
== Current Status / News ==
'''04/06/2010''' Adding the FPGA to the board now, external devboard is gone.  It will be a spartan3e 250 vq100 pkg.
 
 
'''04/03/2010''' Firewire Chip found that offers a High-speed parallel interface, TI TSB12LV32IPZ: http://focus.ti.com/docs/prod/folders/print/tsb12lv32.html
 
 
 
'''03/25/2010''' Mailing List has been added, here is the mailman link to subscribe: https://lists.sourceforge.net/lists/listinfo/openhdcapture-discussion
 
'''03/25/2010''' Mailing List has been added, here is the mailman link to subscribe: https://lists.sourceforge.net/lists/listinfo/openhdcapture-discussion
  
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== Prototyping Hardware (Under constant review) ==
 
== Prototyping Hardware (Under constant review) ==
 
* Spartan Xilinx FPGA Spartan-3 starter board Rev-e [http://www.digilentinc.com/Products/Detail.cfm?Prod=S3BOARD FPGA Board]
 
* Spartan Xilinx FPGA Spartan-3 starter board Rev-e [http://www.digilentinc.com/Products/Detail.cfm?Prod=S3BOARD FPGA Board]
* HiSpeed USB PHY like the [http://www.smsc.com/index.php?tid=143&pid=25 USB3250]
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* HiSpeed USB PHY like the [http://www.sparkfun.com/commerce/product_info.php?products_id=9631 USB3318]
 
* Analog Devices Video A/D chip similar to an ad9883 [http://www.analog.com/en/audiovideo-products/analoghdmidvi-interfaces/ad9883a/products/product.html video decoder]
 
* Analog Devices Video A/D chip similar to an ad9883 [http://www.analog.com/en/audiovideo-products/analoghdmidvi-interfaces/ad9883a/products/product.html video decoder]
 
* Firewire chip from TI [http://focus.ti.com/docs/prod/folders/print/tsb41ab1.html TSB41AB1]
 
* Firewire chip from TI [http://focus.ti.com/docs/prod/folders/print/tsb41ab1.html TSB41AB1]
  
 
== Software ==
 
== Software ==
An example program will be written using the SDL library.  GNU/Linux Drivers will likely use libusb unless I have to go lower level. Hopefully the driver will be V4L2 compliantIf anyone knows how to help with this please contact me.
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An example program will be written using the SDL library.  Linux Drivers will likely use libusb unless I have to go lower level.  I am newb to Linux kernel drivers but I ain't scared ;)
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Also I ain't a newb to linux or programming, just haven't written a driver yet, other than one for a parallel port a while back but that was for a simple I/O project w/ a PC.
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== Current Plan of Action ==
 
== Current Plan of Action ==

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