Difference between revisions of "Minimig FPGA"

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(comparision table + linux support)
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Digikey sells them ;)<br>
 
Digikey sells them ;)<br>
 +
Digikey prices:<br>
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{| class="wikitable"
 +
! Brand!! Chip!! LEs / LCs!! IOs!! Package||Price
 +
|-
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|Altera||CycloneII EP2C8Q208I8||8256||138||208-PQFP||$24.30
 +
|-
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|Altera||CycloneIII EP3C25Q240C8NES||24624||148||240-PQFP||$39.50
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|-
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|Xilinx||Spartan3 XC3S400-4PQ208C||8064||141||208-PQFP||$19.25
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|-
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|Xilinx||Spartan3E XC3S500E-4PQG208C||10476||158||208-PQFP||$20.75
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|}
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FrenchShark:<br>
 
FrenchShark:<br>
 
Use as a south bridge, a CPLD like:<br>
 
Use as a south bridge, a CPLD like:<br>

Revision as of 15:49, 29 July 2007

http://www.amiga.org/modules/newbb/viewtopic.php?topic_id=39358&forum=8&viewmode=flat&order=ASC&start=140
mongo:
Switching from the Spartan 3 XC3S400 to a Spartan 3E XC3S500E would give you about 17 extra I/O pins while still keeping the 208 pin package. It would also give you a good bit of space for bug fixes and/or future enhancements. The current Minimig design uses up about 82% of the XC3S400, but only 65% of an XC3S500E.

Digikey sells them ;)
Digikey prices:

Brand Chip LEs / LCs IOs Package Price
Altera CycloneII EP2C8Q208I8 8256 138 208-PQFP $24.30
Altera CycloneIII EP3C25Q240C8NES 24624 148 240-PQFP $39.50
Xilinx Spartan3 XC3S400-4PQ208C 8064 141 208-PQFP $19.25
Xilinx Spartan3E XC3S500E-4PQG208C 10476 158 208-PQFP $20.75

FrenchShark:
Use as a south bridge, a CPLD like:

Brand Chip Macrocells IOs Price Linux support
Altera MAX 3000 EPM3128ATC100-10 128 80 $8.60 No
Xilinx XL9500XL XC95144XL-10TQ100C 144 81 $5.80 Yes

freqmax: I think that considering Linux support + lower price + consistency with the main fpga. I think that the Xilinx option is better choice. freqmax: Another consideration is that using an fpga instead of an cpld is that options for larger bus expansions like Zorro bus, Harddisc via ATA etc.. becomes viable. Due capability for faster fpga-fpga communications and more I/Os.


The slow IOs from Paula and the 8520s can be moved to the CPLD.
On a real ECS/OCS Amiga, IOs from the 8520s are updated at 700 KHz, IOs from Paula/Denise are updated at 3.5 MHz.
On a real AGA Amiga, the 8520s are slightly faster : the IOs are updated at 1.4 MHz.
If we run a high speed bus at 28 MHz between the FPGA and the CPLD, each wire can "transport" 8 IOs from paula or 20 IOs from a 8520.
The CPLD basically acts as a giant IO demultiplexer.
Moreover, the CPLDs are 5V tolerant and non-volatile.
There is an application note from Altera describing how to use a MAX as an IO expander :
AN 265: Using MAX II & MAX 3000A Devices as a Microcontroller I/O Expander