Difference between revisions of "Minimig Board v1.0 signaling"

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(fpga def)
(SPI MCU<->FPGA<->SD/MMC connections)
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| /FPGA_SEL2 || 27 || RB6 || 87 || IO_L30N_4/D2 ||   
 
| /FPGA_SEL2 || 27 || RB6 || 87 || IO_L30N_4/D2 ||   
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|}
 +
 +
FPGA <-> MCU interface consist of:
 +
{| class="wikitable"
 +
|-
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! Signal !! MCU dir !! SD/MMC dir !! FPGA dir !! Description
 +
|-
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| SPI_CLK  || Out || In  || In || Clock
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|-
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| SPI_DIN  || Out || In  || In || Data
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|-
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| SPI_DOUT || In  || Out || Out || Data 
 
|}
 
|}

Revision as of 21:52, 24 August 2007

minimig1_firmware_15_07_2007/hardware.h
MCU: _F_CSx = FPGA spix select

Signal MCU Pin MCU Name FPGA pin FPGA name Description
/FPGA_SEL0 3 RA1 93 IO EnableFpga() _F_CS0=0
/FPGA_SEL1 26 RB5 86 IO_L30P_4/D3 EnableOsd() _F_CS1=0
/FPGA_SEL2 27 RB6 87 IO_L30N_4/D2

FPGA <-> MCU interface consist of:

Signal MCU dir SD/MMC dir FPGA dir Description
SPI_CLK Out In In Clock
SPI_DIN Out In In Data
SPI_DOUT In Out Out Data
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