Difference between revisions of "Minimig Board v1.0 schematic"

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[[Image:Minimig_v10_board_audio.png|thumb|right|250px|audio]]
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Board schematic for Minimig board v1.0
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[[Image:Minimig_v10_board_dac.png|thumb|right|250px|dac]]
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[[Image:Minimig_v10_board_audio.png|thumb|right|250px|Audio output]]
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[[Image:Minimig_v10_board_fpga.png|thumb|right|250px|fpga]]
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Voltage level: (3.3V/(560ohm + 560ohm + 32ohm))*32 ohm*1000 = 91,7mV<br>
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[[Image:Minimig_v10_board_fpga_core_pwr.png|thumb|right|250px|fpga core pwr]]
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[[Back EMF]] issues?
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[[Image:Minimig_v10_board_fpga_decoupling.png|thumb|right|250px|fpga decoupling]]
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[[Image:Minimig_v10_board_joy0.png|thumb|right|250px|joy0]]
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[[Image:Minimig_v10_board_dac.png|thumb|right|250px|4 bit resistor ladder D/A]]
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[[Image:Minimig_v10_board_joy1.png|thumb|right|250px|joy1]]
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Notice the resistor of 560 ohm. May cause inlinear output.<br>
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[[Image:Minimig_v10_board_jtag.png|thumb|right|250px|jtag]]
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[[Image:Minimig_v10_board_jumpers.png|thumb|right|250px|jumpers]]
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[[Image:Minimig_v10_board_fpga.png|thumb|right|250px|FPGA Xilinx XC3S400-4PQ208C]]
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[[Image:Minimig_v10_board_kbd_mouse.png|thumb|right|250px|kbd mouse]]
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[[Image:Minimig_v10_board_m68k.png|thumb|right|250px|m68k]]
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[[Image:Minimig_v10_board_fpga_core_pwr.png|thumb|right|250px|FPGA core power +1,25V +2,5V using  [http://www.national.com/pf/LM/LM1117.html LM1117MP-ADJ]]]
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[[Image:Minimig_v10_board_m68k_decoupling.png|thumb|right|250px|m68k decoupling]]
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[[Image:Minimig_v10_board_fpga_decoupling.png|thumb|right|250px|FPGA [[decoupling]]]]
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[[Image:Minimig_v10_board_mclk_generator.png|thumb|right|250px|mclk generator]]
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[[Image:Minimig_v10_board_joy0.png|thumb|right|250px|Joystick 0]]
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[[Image:Minimig_v10_board_patch.png|thumb|right|250px|patch]]
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[[Image:Minimig_v10_board_joy1.png|thumb|right|250px|Joystick 1]]
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[[Image:Minimig_v10_board_pic18.png|thumb|right|250px|pic18]]
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[[Image:Minimig_v10_board_jtag.png|thumb|right||[[Jtag]]]]
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[[Image:Minimig_v10_board_ram512x16.png|thumb|right|250px|ram512x16]]
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[[Image:Minimig_v10_board_jumpers.png|thumb|right|250px|Jumper]]
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[[Image:Minimig_v10_board_rs232.png|thumb|right|250px|rs232]]
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[[Image:Minimig_v10_board_kbd_mouse.png|thumb|right|250px|[[Keyboard]] & [[Mouse]] connections]]
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[[Image:Minimig_v10_board_sd_card.png|thumb|right|250px|sd card]]
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[[Image:Minimig_v10_board_m68k.png|thumb|right|250px|MC68000]]
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[[Image:Minimig_v10_board_spare_io.png|thumb|right|250px|spare io]]
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[[Image:Minimig_v10_board_m68k_decoupling.png|thumb|right|250px|MC68000 [[Decoupling]]]]
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[[Image:Minimig_v10_board_mclk_generator.png|thumb|right|250px|Generation of 4.433619 MHz [[PAL]] Video MCLK using [http://www.it.lth.se/datablad/Logik/74HC/74HC4060.pdf 74HC4060] (Ntsc=3.579545MHz)]]
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PATCH needed to get rev 1 board working:<br>
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:Disconnect net SPI_DOUT from pin 81 of FPGA.
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:Connect net SPI_DOUT to pin 19 of FPGA (net USER3).
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:
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;REASON:
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:Pin 81 is an output during FPGA config that blocks SPI to MMC during startup.
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[[Image:Minimig_v10_board_pic18.png|thumb|right|250px|[[MCU]] [http://ww1.microchip.com/downloads/en/devicedoc/39564b.pdf PIC18LF252I/SP]]]
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[[Image:Minimig_v10_board_ram512x16.png|thumb|right|250px|[[Asynchronous static ram]] 512 x 16 bit (2 chips)]]
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[[Image:Minimig_v10_board_rs232.png|thumb|right|250px|Serial [[RS232]] using [http://datasheets.maxim-ic.com/en/ds/MAX220-MAX249.pdf MAX232]]]
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[[Image:Minimig_v10_board_sd_card.png|thumb|right|250px|[[SD Card]] slot]]
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[[Image:Minimig_v10_board_spare_io.png|thumb|right||Spare I/O]]

Revision as of 06:35, 2 August 2007

Board schematic for Minimig board v1.0

Audio output

Voltage level: (3.3V/(560ohm + 560ohm + 32ohm))*32 ohm*1000 = 91,7mV
Back EMF issues?

4 bit resistor ladder D/A

Notice the resistor of 560 ohm. May cause inlinear output.

FPGA Xilinx XC3S400-4PQ208C
FPGA core power +1,25V +2,5V using LM1117MP-ADJ
FPGA decoupling
Joystick 0
Joystick 1
Jtag
Jumper
Keyboard & Mouse connections
MC68000
MC68000 Decoupling
Generation of 4.433619 MHz PAL Video MCLK using 74HC4060 (Ntsc=3.579545MHz)

PATCH needed to get rev 1 board working:

Disconnect net SPI_DOUT from pin 81 of FPGA.
Connect net SPI_DOUT to pin 19 of FPGA (net USER3).
REASON
Pin 81 is an output during FPGA config that blocks SPI to MMC during startup.
MCU [http://ww1.microchip.com/downloads/en/devicedoc/39564b.pdf PIC18LF252I/SP

]

Asynchronous static ram 512 x 16 bit (2 chips)
Serial RS232 using [http://datasheets.maxim-ic.com/en/ds/MAX220-MAX249.pdf MAX232

]

SD Card slot
Spare I/O
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