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[[Image:Minimig 2890.jpg|thumb|right|250px|Minimig 120x120[[Millimetre|mm]] PCB board]] | [[Image:Minimig 2890.jpg|thumb|right|250px|Minimig 120x120[[Millimetre|mm]] PCB board]] | ||
[[#See also|QUICKLINK]]<br> | [[#See also|QUICKLINK]]<br> | ||
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* Creating something for the community. | * Creating something for the community. | ||
* Proof of Concept. | * Proof of Concept. | ||
− | * Can create new games to take advantages of the new features in Minimig (faster memory, more memory | + | * Can create new games to take advantages of the new features in Minimig (faster memory, more memory sprites, colours, etc), while maintaining full compatibility with the classic Amiga. |
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== Hardware == | == Hardware == | ||
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* [[Xilinx#Spartan series|Xilinx Spartan-3]] 400k gate (XC3S400-4PQ208C) FPGA using 60% capacity. | * [[Xilinx#Spartan series|Xilinx Spartan-3]] 400k gate (XC3S400-4PQ208C) FPGA using 60% capacity. | ||
− | * [[Freescale Semiconductor|Freescale]] MC68SEC000 (MC68SEC000FU20; MC68SEC000AA20 proposed as replacement part by Freescale), 3,3[[Volt|V]], | + | * [[Freescale Semiconductor|Freescale]] MC68SEC000 (MC68SEC000FU20; MC68SEC000AA20 proposed as replacement part by Freescale), 3,3[[Volt|V]], at 7.09379 [[Hertz|MHz]]. (However there's no 'E' clock, MOVE sr,<EA> is privileged and there is no real replacement instruction. This does not seem to affect any programs as of yet however.) |
* Amiga ChipRAM bus and FastRAM merged into a single synchronous bus running at 7.09379 MHz. | * Amiga ChipRAM bus and FastRAM merged into a single synchronous bus running at 7.09379 MHz. | ||
* 2 [[Mebibyte|MB]] 70 [[1 E-9 s|ns]] [[Static random access memory|SRAM]] organised as 2 524288*16 banks. | * 2 [[Mebibyte|MB]] 70 [[1 E-9 s|ns]] [[Static random access memory|SRAM]] organised as 2 524288*16 banks. | ||
* [[Microcontroller|MCU]] [[PIC microcontroller#PIC18 High End Core Devices|PIC 18LF252-I/SP]] <ref>{{cite web|title=PIC18F252|url=http://www.microchip.com/stellent/idcplg?IdcService=SS_GET_PAGE&nodeId=1335&dDocName=en010276}} 070715 microchip.com</ref> (an alternative would be [[Atmel AVR]]) implements a [[File Allocation Table|FAT16]] disclayout and handles loading of fpga configuration and kickstart. Simulates a floppy to the Amiga by encoding on the fly from [[Amiga Disk File|.ADF]] files. <!-- This is NOT the TNT23 project. --> | * [[Microcontroller|MCU]] [[PIC microcontroller#PIC18 High End Core Devices|PIC 18LF252-I/SP]] <ref>{{cite web|title=PIC18F252|url=http://www.microchip.com/stellent/idcplg?IdcService=SS_GET_PAGE&nodeId=1335&dDocName=en010276}} 070715 microchip.com</ref> (an alternative would be [[Atmel AVR]]) implements a [[File Allocation Table|FAT16]] disclayout and handles loading of fpga configuration and kickstart. Simulates a floppy to the Amiga by encoding on the fly from [[Amiga Disk File|.ADF]] files. <!-- This is NOT the TNT23 project. --> | ||
* [[Multi Media Card|MMC]] [[Flash memory|Flash memory card]] to load fpga configuration, kickstart and software for the simulated computer. | * [[Multi Media Card|MMC]] [[Flash memory|Flash memory card]] to load fpga configuration, kickstart and software for the simulated computer. | ||
− | * | + | * 3Ã [[Light-emitting diode|LED]]s to display the [[MC68000]] processor run status. |
− | * Video [[Digital-to-analog converter|D/A]] consists of 4 [[resistor|resistors]] for each color red, green, blue (4 bits/color) and output via [[Video Graphics Array|VGA]] connector. [http:// | + | * Video [[Digital-to-analog converter|D/A]] consists of 4 [[resistor|resistors]] for each color red, green, blue (4 bits/color) and output via [[Video Graphics Array|VGA]] connector. <ref>[http://home.hetnet.nl/~weeren001/downloads/minimig1_schematics.pdf Minimig schematics v1] Page3</ref> |
* Audio from an 8 bit [[dither|dithering]] [[Delta-sigma modulation|sigma-delta]] converter with 2nd order analogue [[Electronic filter|filter]]. | * Audio from an 8 bit [[dither|dithering]] [[Delta-sigma modulation|sigma-delta]] converter with 2nd order analogue [[Electronic filter|filter]]. | ||
* +5V [[Direct Current|DC]] main power. | * +5V [[Direct Current|DC]] main power. | ||
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* [[Original Amiga chipset|OCS]] [[PAL]] video. | * [[Original Amiga chipset|OCS]] [[PAL]] video. | ||
* 512 [[Kibibyte|kB]] [[Static random access memory|SRAM]] RAM for Kickstart used as [[Read-only memory|ROM]]. | * 512 [[Kibibyte|kB]] [[Static random access memory|SRAM]] RAM for Kickstart used as [[Read-only memory|ROM]]. | ||
− | * 1 [[Mebibyte|MB]] [[Static random access memory|SRAM]] [[Amiga Chip RAM|ChipRAM]] | + | * 1,5 [[Mebibyte|MB]] [[Static random access memory|SRAM]] [[Amiga Chip RAM|ChipRAM]]/[[Amiga Chip RAM|FastRAM]]. |
== Roadmap == | == Roadmap == | ||
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* [http://en.wikipedia.org/wiki/Minimig Wikipedia:Minimig] | * [http://en.wikipedia.org/wiki/Minimig Wikipedia:Minimig] | ||
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* [http://home.hetnet.nl/~weeren001/ Official Website including released code] [http://home.hetnet.nl/~weeren001/downloads.html 'download-link'] | * [http://home.hetnet.nl/~weeren001/ Official Website including released code] [http://home.hetnet.nl/~weeren001/downloads.html 'download-link'] | ||
* [http://www.amiga.org/modules/news/article.php?storyid=7386 Official announcement] | * [http://www.amiga.org/modules/news/article.php?storyid=7386 Official announcement] |