JTAG

From OpenCircuits
Revision as of 22:51, 9 September 2007 by 189.21.156.2 (talk)
Jump to navigation Jump to search

infinity beta 50 tostapane a piastre eukanuba senior harry baird adobe creative suite 2 mac ghost jarre dalila y que de mi pioneer ts05 zz top greatest hits lg lcd 20 tv epson stylus multifunzione robinhood proposte ministero dell istruzione 2003 kameleon ii viaggio ecuador cd campus live franch foto di roberto farnesi www husqvarna it reggeton hector y tito anona volo da milano per olbia fm trasmettitore bubble adventures haydn 94 download clean system dvd stampante nimbus it epson photo r300 subaru impreza 2001 usata dual scan tattooed millionaire tv y novels rasmussen knud final fantasy crystal chronicles future model menagement two www arcobaleno com ristorante la diligenza oliastro headset logitech hector y tito don omar volkswagen golf 2 0 tdi 2003 masterizzatori dvd lite on televisore 14 hard disk esterni 250 gb video que lloro pillola dimagranti amd athlon 64 fx 57 ortodossi segnali di pericolo lo strano percorso midi logitech dinovo media desktop mouse nero multi channel www numeri cellulari it semafori pizzeria ricette di pasta hart il concetto di diritto aspirapolvere a traino la squadra stagione 1 episodio 13 postal virtual so tell the girls stars nude syncmaster 173p testo di this love dei maroon5 impresa donna in calabria calendari dei ragazzi flirt game stampa digitale grande formato galerias de mujeres catalogo datch sblocco per cellulari tre scarpa scarpa la gita a tindari km0 fiat punto speed auto km 0 el carte de santa dvdr stampabili adsl wireless ethernet hard disk photo model three out here on my own nikka costa http hotmail com kodak easyshare dx 6490 brano di o c california tomtom go mappe asha televisione b n lucky luke dam albert sogni grandiosi master business super noba elezion candidati abbigliamento kway netgear wifi immagini attrici upm pellegrini francesco rice alice caldwell The Joint Test Action Group (JTAG) standardized a 5 pin boundary-scan test port as IEEE Std. 1149.1, "Standard Test Access Port and Boundary-Scan Architecture".

While originally intended for boundary-scan testing of PCB assemblies, to replace bed-of-nails testing, the JTAG port included in many popular microprocessors is also often used for programming and debugging.

"If you have information on how to connect a JTAG probe to a Nokia phone, please let me know."

There are five pins:

  • TCK/clock
  • TMS/mode select
  • TDI/data in
  • TDO/data out
  • TRST/reset (optional), when driven low, resets the internal state machine.

Except for TCK, all other JTAG lines should be pulled high via a resistor.


WARNING: unconfirmed pinout. Please add links to pinout standard.

20 Pin JTAG PinOut

Which one of these is right?

   Pin Function Pin Function
   1   TRST     2   GND
   3   TDO      4   GND
   5   TDI      6   GND
   7   TMS      8   GND
   9   TCK     10   GND
   11  VPP_E   12   GND
   13  A/W     14   GND
   15  User 0  16   GND
   17  Rdy/Bsy 18   GND
   19  User 1  20   Vcc
    1  3.3 V    2  3.3 V
    3 nTRST     4 GND
    5 TDI       6 GND
    7 TMS       8 GND
    9 TCK      10 GND
   11  --      12 GND
   13 TDO      14 GND
   15 nRST     16 GND
   17  --      18 GND
   19  --      20 GND 


external links

1000 et/ the Jtag-Arm9 project at Sourceforge] gives instructions and photographs of a Home made JTAG interface (also shows an example of prototyping using SMT IC)