Editing JTAG
Jump to navigation
Jump to search
Warning: You are not logged in. Your IP address will be publicly visible if you make any edits. If you log in or create an account, your edits will be attributed to your username, along with other benefits.
The edit can be undone. Please check the comparison below to verify that this is what you want to do, and then save the changes below to finish undoing the edit.
| Latest revision | Your text | ||
| Line 1: | Line 1: | ||
| − | The Joint Test Action Group (JTAG) standardized a 5 | + | The Joint Test Action Group (JTAG) standardized a 5 pin boundary-scan test port as IEEE Std. 1149.1, "Standard Test Access Port and Boundary-Scan Architecture". |
While originally intended for boundary-scan testing of PCB assemblies, to replace bed-of-nails testing, the JTAG port included in many popular microprocessors is also often used for programming and debugging. | While originally intended for boundary-scan testing of PCB assemblies, to replace bed-of-nails testing, the JTAG port included in many popular microprocessors is also often used for programming and debugging. | ||
| Line 5: | Line 5: | ||
[http://hogyros.de/?q=node/167 "If you have information on how to connect a JTAG probe to a Nokia phone, please let me know."] | [http://hogyros.de/?q=node/167 "If you have information on how to connect a JTAG probe to a Nokia phone, please let me know."] | ||
| − | There are five | + | There are five pins: |
* TCK/clock | * TCK/clock | ||
* TMS/mode select | * TMS/mode select | ||
