Difference between revisions of "Minimig Improvements"
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(MCU pin header user i/o) |
(moved comment into 'RTL m68k') |
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:[[Minimig Faster CPU|Faster CPU]] (68020? -> can run [[netbsd]]) | :[[Minimig Faster CPU|Faster CPU]] (68020? -> can run [[netbsd]]) | ||
:[[RTL m68k|CPU in verilog/vhdl]] (single-chip FPGA + CPU) | :[[RTL m68k|CPU in verilog/vhdl]] (single-chip FPGA + CPU) | ||
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: [http://en.wikipedia.org/wiki/Fpga#Modern_developments Wikipedia:FPGA] mentions a few such "FPGA + CPU chip" devices. | : [http://en.wikipedia.org/wiki/Fpga#Modern_developments Wikipedia:FPGA] mentions a few such "FPGA + CPU chip" devices. | ||
:[[Minimig 68K CPU BERR* Support]] (For 68K BERR* Vector when non-existant memory accessed) | :[[Minimig 68K CPU BERR* Support]] (For 68K BERR* Vector when non-existant memory accessed) | ||
Revision as of 13:48, 26 August 2007
Some ideas for improving Minimig:
Improvements:
- Minimig Selftest
- ECS graphics - First to do?, after all more software can use ECS than AGA
- AGA graphics
- Harddisc
- Ethernet Rid of the need for flashmemories? (network boot)
- Use SDram
- MCU rs232tx -or- FPGA rs232tx
- 50/60Hz (pal/ntsc)
- S-Video Resistor D/A issues etc..
- Breakout connectors instead of pcb mounted
- Wire the unused MCU (pic18xxxx) ports to a user I/O pin header
- Kickstart replacement
- Discimage support .ADF .DMS .FDI .ADZ
- Expansion via Zorro ISA PCI PCI-Express
- Upgrade the FPGA
- RTL devices
- Create a real floppy controller (see Amiga floppy project)
- Simulate Atari ST, Macintosh-m68k etc..
- Realtime clock
- Parallel port
CPU improvements:
- Faster CPU (68020? -> can run netbsd)
- CPU in verilog/vhdl (single-chip FPGA + CPU)
- Wikipedia:FPGA mentions a few such "FPGA + CPU chip" devices.
- Minimig 68K CPU BERR* Support (For 68K BERR* Vector when non-existant memory accessed)
Resources:
